MIDTERM EXAMINATION
Spring 2010
Spring 2010
CS302- Digital Logic Design
Time: 60 min
M a r k s: 38
Question No: 1 ( M a r k s: 1 ) http://vuzs.net
The maximum number that can be represented using unsigned octal system is _______
► 1
► 7
► 9
► 16
Question No: 2 ( M a r k s: 1 ) http://vuzs.net
If we add “723” and “134” by representing them in floating point notation i.e. by first, converting them in floating point representation and then adding them, the value of exponent of result will be ________
► 0
► 1
► 2
► 3
Question No: 3 ( M a r k s: 1 ) http://vuzs.net
The diagram given below represents __________
► Demorgans law
► Associative law
► Product of sum form
► Sum of product form
Question No: 4 ( M a r k s: 1 ) http://vuzs
The range of Excess-8 code is from ______ to ______
► +7 to -8
► +8 to -7
► +9 to -8
► -9 to +8
Question No: 5 ( M a r k s: 1 ) http://vuzs.net
A non-standard POS is converted into a standard POS by using the rule _____
► .
►
►
► A+B = B+A
Question No: 6 ( M a r k s: 1 ) http://vuzs.net
The 3-variable Karnaugh Map (K-Map) has _______ cells for min or max terms
► 4
► 8
► 12
► 16
Question No: 7 ( M a r k s: 1 ) http://vuzs.net
The binary numbers A = 1100 and B = 1001 are applied to the inputs of a comparator. What are the output levels?
Fore more solution http://groups.google.com/group/vubest
► A > B = 1, A < B = 0, A < B = 1
► A > B = 0, A < B = 1, A = B = 0
► A > B = 1, A < B = 0, A = B = 0
► A > B = 0, A < B = 1, A = B = 1
Question No: 8 ( M a r k s: 1 ) http://vuzs.net
A particular Full Adder has
► 3 inputs and 2 output
► 3 inputs and 3 output
► 2 inputs and 3 output
► 2 inputs and 2 output
Question No: 9 ( M a r k s: 1 ) http://vuzs.net
. The function to be performed by the processor is selected by set of inputs known as ________
► Function Select Inputs
► MicroOperation selectors
► OPCODE Selectors
► None of given option
Fore more solution http://groups.google.com/group/vubest
Question No: 10 ( M a r k s: 1 ) http://vuzs.net
For a 3-to-8 decoder how many 2-to-4 decoders will be required?
► 2
► 1
► 3
► 4
Fore more solution http://groups.google.com/group/vubest
Question No: 11 ( M a r k s: 1 ) http://vuzs.net
GAL is an acronym for ________.
► Giant Array Logic
► General Array Logic
► Generic Array Logic
► Generic Analysis Logic
Question No: 12 ( M a r k s: 1 ) http://vuzs.net
The Quad Multiplexer has _____ outputs
► 4
► 8
► 12
► 16
Fore more solution http://groups.google.com/group/vubest
Question No: 13 ( M a r k s: 1 ) http://vuzs.net
A.(B.C) = (A.B).C is an expression of __________
► Demorgan’s Law
► Distributive Law
► Commutative Law
► Associative Law
Question No: 14 ( M a r k s: 1 ) http://vuzs.net
2's complement of any binary number can be calculated by
► adding 1's complement twice
► adding 1 to 1's complement
► subtracting 1 from 1's complement. (not confirm)
► calculating 1's complement and inverting Most significant bit
Question No: 15 ( M a r k s: 1 ) http://vuzs.net
The binary value “1010110” is equivalent to decimal __________
► 86
► 87
► 88
► 89
Question No: 16 ( M a r k s: 1 ) http://vuzs.net
Tri-State Buffer is basically a/an _________ gate.
► AND
► OR
► NOT
► XOR
Fore more solution http://groups.google.com/group/vubest
Question No: 17 ( M a r k s: 2 )
For what values of A, B, C and D, value of the expression given below will be logic 1. Explain at least one combination.
Question No: 18 ( M a r k s: 2 )
provide some of the inputs for which the adjacent 1s detector circuit have active high output?
Question No: 19 ( M a r k s: 2 )
. Draw the Truth-Table of NOR based S-R Latch
Question No: 20 ( M a r k s: 3 )
For a two bit comparator circuit specify the inputs for which A > B
Question No: 21 ( M a r k s: 3 )
Fore more solution http://groups.google.com/group/vubest
Draw the circuit diagram of NOR based S-R Latch ?
Question No: 22 ( M a r k s: 5 )
One of the ABEL entry methods uses logic equations; explain it with at least a single example.
Question No: 23 ( M a r k s: 5 )
Explain Carry propagation in Parralel binary adder?
Fore more solution http://groups.google.com/group/vubest
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